A Scheduler ASIC for a Programmable Packet Switch

 

Zhang, L.L. ; Beacham, B. ; Hashemi, M.R. ; Chow, P. ; Leon-Garcia, A.
A Scheduler ASIC for a Programmable Packet Switch
Micro, IEEE
Volume: 20 , Issue: 1; Jan/Feb 2000
Page(s): 42 - 48

Abstract:

While the Internet is successful in supporting traditional data-only traffic, an integrated services Internet is inevitable with the emergence of new applications such as voice, video, multimedia, and interactive video conferencing. Such an integrated services network should support a wide range of applications with diverse quality of service requirements and traffic characteristics. Provision for quality of service in packet networks in general, and in the Internet in particular, is the focus of most of the recent developments in switching and routing system design. We designed a generic, single-queue scheduler engine for use in a programmable packet switch/router to handle IP packets, ATM cells, or a combination of both. Comprising 275,000 gates, the 0.35-micron ASIC is incorporated into a prototype programmable packet switch.

January, 2000

Link To Online Resource: 

http://ieeexplore.ieee.org/xpl/tocresult.jsp?isnumber=17785&punumber=40


 

Year: 
2000
Month/Season: 
January
Type: 
Journal Papers

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